In this merge request, Francisco Jerez, member of Intel’s open source Linux graphics team, stated the following: “Gen12 is planned to include one of the most in-depth reworks of the Intel EU ISA since the original i965. The encoding of almost every instruction field, hardware opcode and register type needs to be updated in this merge request. But probably the most invasive change is the removal of the register scoreboard logic from the hardware, which means that the EU will no longer guarantee data coherency between register reads and writes, and will require the compiler to synchronize dependent instructions anytime there is a potential data hazard…”
Planned for release sometime around 2020/2021 (with Tiger Lake), Gen12 graphics features a complete overhaul of Execution Unit in a way we haven’t seen since i965 debut. There will be less hardware logic that checks data for coherency, possibly resulting in lower latency and higher performance. That workload will shift from logic built into hardware, to compilers for them to figure out if data is correct or not, resulting in less wasted GPU clock cycles dedicated to that function.
Phoronix via HotHardware